Abstract Many emerging processor microarchitectures seek tomanage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to non-uniform designs that provide resources at multiple quality levels (e.g., fast/slow bypass paths, multi-speed func-tional units, and grid architectures). In such designs, the constraint problem becomes a control problem, andthe challenge becomes designing a control policy that mitigates the performance penalty of the non-uniformity.Given the increasing importance of non-uniform control policies, we believe it is appropriate to examine them intheir own right. To this end, we develop slack for use in creating con-trol policies that match program execution behavior to machine design. Intuitively, the slack of a dynamic in-struction i is the number of cycles i can be delayed withno effect on execution time. This property makes slack a natural candidate for hiding non-uniform latencies.We make three contributions in our exploration of slack. First, we formally define slack, distinguishthree variants (local, global and apportioned), and perform a limit study to show that slack is prevalentin our SPEC2000 workload. Second, we show how to predict slack in hardware. Third, we illustrate howto create a control policy based on slack for steering instructions among fast (high power) and slow (lowerpower) pipelines. 1 Introduction Recent years have witnessed a proliferation of technol-ogy constraint-aware design proposals. For example, physical clustering of functional units has attacked wiredelays [7, 8], multi-frequency functional-units have addressed power consumption , and grid architectureshave sought to reduce cycle time . More importantly, it appears that wire, power, and circuit-complexity trendswill make constraint-aware designs even more prevalent in the future.A challenging feature of many constraint-aware designs is that they introduce non-uniformity, where one o
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