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Rigorous Analog Verification of Asynchronous Circuits

By Karl Papadantonakis


iii After nearly six years of my most focused work ever, I have reached what I believe to be an important milestone in the theory of asynchronous VLSI. In my first few months at Caltech it became clear to me that this milestone – a method for rigorous verification of asynchronous circuits, sufficient for arbitrary computation – was still a dream, but clearly a possibility. I shared this dream with many great thinkers at Caltech who have known the dream long before me and made significant contributions. I merely assembled the pieces into one possible complete picture. While I claim credit for an original formulation, analysis, and solution to the problem, the vision and a large part of the intuition came from my advisor, professor Alain J. Martin, and his Caltech Asynchronous VLSI Group. A key element of the group’s research is the synergy of two previously disjoint fields of study. Alain is unique in his advanced knowledge of both fields and in his vision to combine the two. Those two fields are hardware imple-mentation in VLSI and hardware specification as distributed systems. Alain has dedicated the last two decades to combining specification and implementation concepts, yielding th

Year: 2006
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