Skip to main content
Article thumbnail
Location of Repository

Rigorous Analog Verification of Asynchronous Circuits

By Karl Papadantonakis

Abstract

iii After nearly six years of my most focused work ever, I have reached what I believe to be an important milestone in the theory of asynchronous VLSI. In my first few months at Caltech it became clear to me that this milestone – a method for rigorous verification of asynchronous circuits, sufficient for arbitrary computation – was still a dream, but clearly a possibility. I shared this dream with many great thinkers at Caltech who have known the dream long before me and made significant contributions. I merely assembled the pieces into one possible complete picture. While I claim credit for an original formulation, analysis, and solution to the problem, the vision and a large part of the intuition came from my advisor, professor Alain J. Martin, and his Caltech Asynchronous VLSI Group. A key element of the group’s research is the synergy of two previously disjoint fields of study. Alain is unique in his advanced knowledge of both fields and in his vision to combine the two. Those two fields are hardware imple-mentation in VLSI and hardware specification as distributed systems. Alain has dedicated the last two decades to combining specification and implementation concepts, yielding th

Year: 2006
OAI identifier: oai:CiteSeerX.psu:10.1.1.134.8696
Provided by: CiteSeerX
Download PDF:
Sorry, we are unable to provide the full text but you may find it at the following location(s):
  • http://citeseerx.ist.psu.edu/v... (external link)
  • http://etd.caltech.edu/etd/ava... (external link)
  • Suggested articles


    To submit an update or takedown request for this paper, please submit an Update/Correction/Removal Request.