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An ultra-wideband transceiver architecture for low power, low rate, wireless systems

By Ian D. O’donnell and Robert W. Brodersen

Abstract

Abstract—This paper presents the system architecture, modeling, and design constraints for a baseband, integrated, CMOS, impulse ultra-wideband transceiver targeting very low power consumption on the order of 1 mW. Intended for a sensor network application, the radio supports low communication rates (∼100 kpbs) and ranging capabilities over short distances (∼10 m). Based on a “mostly digital ” architecture, the analog complexity is reduced by moving the A/D convertor as close to the antenna as is reasonable. Pulses are generated from simple digital switches, overlaying the signal energy on the lower FCC UWB band (0–960 MHz). Reception is achieved using baseband gain blocks feeding a timeinterleaved bank of low resolution A/D converters. A window of energy is captured in time and fed to the digital backend for processing. To save power and area, the digital backend implements only a pulse template correlation filter block overlaid with an additional spreading code. As a pulse template is used, no specific channel estimation or interference cancellation is assumed. The system performance is quantified for this case and implementation tradeoffs are explored with a strong focus on reducing power consumption. In particular, the issues of modulation choice, clock generation, gain and noise figure, ADC resolution, and digital signal processing requirements will be discussed. Index Terms—Digital radio, impulse radio, low power, transceiver, ultra-wideband. I

Year: 2005
OAI identifier: oai:CiteSeerX.psu:10.1.1.120.8018
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