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Interfacial behavior of a flip-chip structure under thermal testing

By Z.W. Zhong, K.W. Wong and X.Q. Shi

Abstract

In this paper, the interfacial behavior of a flip-chip structure under thermal testing was investigated using high sensitivity, real-time Moire interferometry. The model package studied was a sandwich structure consisting of a silicon chip, epoxy underfill and FR4 substrate. The behavior of FR4-underfill and silicon-underfill interfaces of the specimen under certain thermal loading was examined. The results show that the shear strain variation increases significantly along the interfaces, with the maximum shear strain concentration occurring at the edge of the specimen. At the edge, the maximum shear strain occurs at the silicon-underfill interface, and the FR4-underfill interface experiences a slightly lower shear strain. The creep effect is more dominant in the FR4-underfill interface when the specimen is heated for 2 h at 100°C. Upon cooling to 20°C, both the interfaces of the specimen experience partial strain recovery

Publisher: 'Institute of Electrical and Electronics Engineers (IEEE)'
Year: 2004
DOI identifier: 10.1109/tepm.2004.830516
OAI identifier: oai:researchrepository.murdoch.edu.au:22765
Provided by: Research Repository

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