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Cost modeling for 2.5D and 3D stacked ICs

By Mottaqiallah Taouil, Said Hamdioui, Erik Jan Marinissen, P.D. Franzon, E.J. Marinissen and M.S. Bakir

Abstract

This chapter discusses cost modeling for 2.5D/3D‐stacked integrated circuits (2.5D/3D‐SICs) and presents a tool that considers all costs involved in the whole production chain, including design, manufacturing, test, packaging, and logistics. The tool provides the estimated overall cost for 2.5D/3D‐SICs and its cost breakdown for a given input parameter set consisting of test flows, die yield, stack yield, etc. The chapter defines test flows and highlights the importance of testing. In order to determine the most cost‐effective test flow, test requirements should be specified. However, taking only the test cost into consideration is not sufficient to provide a fair evaluation and/or comparison; a test flow does not only impact test cost but also design and manufacturing cost. The chapter defines and classifies the different costs involved in designing and manufacturing 2.5D/3D‐SICs. It also presents the 3D‐COSTAR cost model. It shows the crucial importance of 3D‐COSTAR by analyzing trade‐offs for several test optimization problems

Publisher: Wiley-VCH Verlag
Year: 2019
DOI identifier: 10.1002/9783527697052.ch9
OAI identifier:
Provided by: NARCIS
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