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Implementing log-add algorithm in hardware

By Stephen Jonathan Melnikoff and Steven Francis Quigley

Abstract

A hardware implementation of the log-add algorithm, being a simple method of computing ln(A + B) given ln(A) and ln(B), as used in speech recognition, is presented. It is shown that it can be efficiently implemented in hardware using a small look-up table plus some additional arithmetic logic, with no significant loss of accuracy over direct calculation

Topics: TK Electrical engineering. Electronics Nuclear engineering, QA75 Electronic computers. Computer science
Publisher: Institution of Engineering and Technology
Year: 2003
OAI identifier: oai:eprints.bham.ac.uk:23
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