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A Contraction Method for Locating All the DC Solutions of Circuits Containing Bipolar Transistors

By L.O. Chua, G.S. Gajani, L.B. Goldgeisser, V. Jimenez-Fernandez, L. Kolev, L. Kolev, S. Pastore, S. Pastore, A. Reibiger, I.W. Sandberg, M. Tadeusiewicz, M. Tadeusiewicz, M. Tadeusiewicz, M. Tadeusiewicz, M. Tadeusiewicz, M. Tadeusiewicz, M. Tadeusiewicz, M. Tadeusiewicz, M. Tadeusiewicz and K. Yamamura and K. Yamamura
Publisher: 'Springer Science and Business Media LLC'
DOI identifier: 10.1007/s00034-011-9362-1
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Provided by: MUCC (Crossref)

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