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SiGe heterostructure CMOS circuits and applications

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Abstract

A review is given of the 300 K electron and hole mobilities in Si/SeGe heterostructures and the potential applications of these materials in CMOS technology. Prospects for further enhancements in carrier mobility and CMOS process design options are discussed for Si/SiGe strained layers on Si and on relaxed SiGe 'virtual substrates'. Recent work on heterointerface quality, limited area growth of virtual substrates, carrier mobility and velocity-field characteristics is also reported. (C) 1999 Elsevier Science Ltd. All rights reserved

Topics: TK, QC
Publisher: PERGAMON-ELSEVIER SCIENCE LTD
OAI identifier: oai:wrap.warwick.ac.uk:14145
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