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SoPC-based Memetic Algorithm for Vector Quantizer Design

By 翁聖凱 and Sheng-Kai Weng

Abstract

[[abstract]]A novel hardware architecture for memetic vector quantizer (VQ) design is presented in this thesis. The architecture uses steady-state genetic algorithm (GA) for global search, and C-means algorithm for local refinement. It adopts a shift register based circuit for accelerating mutation and crossover operations in the steady state GA. It also uses a pipeline architecture for the hardware implementation of C-means algorithm. The proposed architecture has been embedded in a softcore CPU for physical performance measurement. Experimental results show that the proposed architecture is an effective alternative for VQ optimization attaining both high performance and low computational time.

Topics: 基因法則;系統晶片設計;向量量化器;可程式化邏輯閘陣列, GA;SOPC;VQ;FPGA, [[classification]]42
Year: 2011
OAI identifier: oai:ir.lib.ntnu.edu.tw:309250000Q/74317
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