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Parallel Backprojection: A Case Study in High-Performance Reconfigurable Computing

By Cordes Ben and Leeser Miriam

Abstract

<p/> <p>High-performance reconfigurable computing (HPRC) is a novel approach to provide large-scale computing power to modern scientific applications. Using both general-purpose processors and FPGAs allows application designers to exploit fine-grained and coarse-grained parallelism, achieving high degrees of speedup. One scientific application that benefits from this technique is backprojection, an image formation algorithm that can be used as part of a synthetic aperture radar (SAR) processing system. We present an implementation of backprojection for SAR on an HPRC system. Using simulated data taken at a variety of ranges, our implementation runs over 200 times faster than a similar software program, with an overall application speedup better than 50x. The backprojection application is easily parallelizable, achieving near-linear speedup when run on multiple nodes of a clustered HPRC system. The results presented can be applied to other systems and other algorithms with similar characteristics.</p

Topics: Electrical engineering. Electronics. Nuclear engineering, TK1-9971, Technology, T, DOAJ:Electrical and Nuclear Engineering, DOAJ:Technology and Engineering, Electronics, TK7800-8360
Publisher: Springer
Year: 2009
OAI identifier: oai:doaj.org/article:07da3ae52ac140c79f82dea8efaaafba
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